Some bad blocks may remain in a semiconductor memory device following manufacture of the device. The bad blocks may be identified as defective at the time of performing manufacturing tests on the device. Bad block identification, documentation, and tagging may prevent an accidental use of the bad blocks during operation of the memory device. Some devices may document bad block information on a die or module corresponding to the memory device. The bad block information may include the bad block address or other identifier thereof. Some devices may tag the bad block using fusible link logic. Other devices may store the bad block information in writeable, non-volatile memory cells. Flash memory devices may include such cells, for example.
In the latter case, accessing the bad block information stored in the writeable, non-volatile memory cells to make decisions about whether to use a memory block may be impractical if attempted in real time, during normal memory device operation. Read access times, address compare times, and a logic complexity associated with real-time compare operations may preclude such use of the stored bad block addresses.
Instead, the memory device may execute a bad block tagging sequence upon power-up, before user access to the device is permitted. The memory device may read the stored bad block addresses and may set a “tag” latch associated with each bad block address. During normal device operation after power-up, memory device access logic may attempt to access a given bad block. The logic may sense that the bad block latch is set and consequently skip the access attempt. The tagging operation thus isolates the bad blocks and prevents their accidental use.
Over time, single-bit “disturb event” errors may develop in the stored bad block information due to aging or excessive cycling of the writeable, non-volatile memory cells. A bad block address so affected may cause a bad block not to be tagged, or may result in a good block being tagged as bad.